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The parameters to the above procedure calls are described in Table E-1 . To simplify the parameters, some predefined
types are used. These are defined in the misc.vhd package.
subtype NIBBLE is std_logic_vector ( 3 downto 0);
subtype DWORD is std_logic_vector (31 downto 0);
type DWORD_ARRAY is array ( INTEGER range <>) of DWORD;
Table E-1 · Procedure Call Parameters
Parameter
SLOT
ADDRESS
DATA_DW
DATAH_DW
DATAL_DW
DATA_INT
DATAH_INT
DATAL_INT
PCICMD
PCISTAT
MSETUP
Type
INTEGER
INTEGER
DWORD
DWORD
DWORD
INTEGER
INTEGER
INTEGER
TPCICMD
TPCISTAT
TMSETUP
Description
PCI slot number to use for configuration cycles
When 0, will set the eight upper address bits to 01 hex.
When 1, will set the eight upper address bits to 02 hex, etc.
The testbench connects address bit 25 to the core IDSEL input; therefore, the slot number should
be set to 1.
Address for the PCI cycle
Data word
Upper 32 bits of a 64-bit data word
Lower 32 bits of a 64-bit data word
Data word
Upper 32 bits of a 64-bit data word
Lower 32 bits of a 64-bit data word
Record used to communicate within the testbench. Allows the procedure to start the PCI Master
cycle.
Record used to communicate within the testbench. Allows the procedure to monitor the PCI
Master cycle.
Record used to set the Master transfer rates. This contains four fields that may be altered.
144
Name
IRDYRATE0
IRDYRATEN
PCI64
ERROR
Type
INTEGER
INTEGER
BOOLEAN
TERROR
v4.0
Description
Initial delay from FRAME to IRDY assertion
Subsequent delay between IRDY assertions
Indicates whether to request a 64-bit transfer.
Allows errors conditions to be inserted. Should be set to
“NONE” for normal operation. Supported error conditions are
described in the VHDL source files.
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